? 2000 fairchild semiconductor corporation ds500232 www.fairchildsemi.com december 1999 revised march 2000 74VCXH16240 low voltage 16-bit inverting buffer/line driver 74VCXH16240 low voltage 16-bit inverting buffer/line driver with bushold general description the vcxh16240 contains sixteen inverting buffers with 3- state outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. the device is nibble (4-bit) controlled. each nibble has sep- arate 3-state control inputs which can be shorted together for full 16-bit operation. the vcxh16240 data inputs include active bushold cir- cuitry, eliminating the need for external pull-up resistors to hold unused or floating inputs at a valid logic level. the 74VCXH16240 is designed for low voltage (1.65v to 3.6v) v cc applications with output capability up to 3.6v. the 74VCXH16240 is fabricated with an advanced cmos technology to achieve high speed operation while maintain- ing low cmos power dissipation. features n 1.65vC3.6v v cc supply operation n 3.6v tolerant control inputs and outputs n bushold on data inputs eliminates the need for external pull-up/pull-down resistors n t pd 2.5 ns max for 3.0v to 3.6v v cc 3.0 ns max for 2.3v to 2.7v v cc 6.0 ns max for 1.65v to 1.95v v cc n static drive (i oh /i ol ) 24 ma @ 3.0v v cc 18 ma @ 2.3v v cc 6 ma @ 1.65v v cc n uses patented noise/emi reduction circuitry n latch-up performance exceeds 300 ma n esd performance: human body model > 2000v machine model > 200v ordering code: devices also available in tape and reel. specify by appending the suffix letter x to the ordering code. logic symbol pin descriptions order number package package descriptions number 74VCXH16240mtd mtd48 48-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide pin names description oe n output enable input (active low) i 0 Ci 15 bushold inputs o 0 Co 15 outputs
www.fairchildsemi.com 2 74VCXH16240 connection diagram truth tables h = high voltage level l = low voltage level x = immate rial (high or low, inputs may not float) z = high impedance functional description the 74VCXH16240 contains sixteen inverting buffers with 3-state outputs. the device is nibble (4 bits) controlled with each nibble functioning identically, but independent of each other. the control pins may be shorted together to obtain full 16-bit operation.the 3-state outputs are con- trolled by an output enable (oe n ) input. when oe n is low, the outputs are in the 2-state mode. when oe n is high, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the inputs. logic diagram inputs outputs oe 1 i 0 Ci 3 o 0 Co 3 ll h lh l hx z inputs outputs oe 2 i 4 Ci 7 o 4 Co 7 ll h lh l hx z inputs outputs oe 3 i 8 Ci 11 o 8 Co 11 ll h lh l hx z inputs outputs oe 4 i 12 Ci 15 o 12 Co 15 ll h lh l hx z
3 www.fairchildsemi.com 74VCXH16240 absolute maximum ratings (note 1) recommended operating conditions (note 3) note 1: the absolute maximum ratings are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum rat- ings. the recommended operating conditions table will define the condi- tions for actual device operation. note 2: i o absolute maximum rating must be observed. note 3: floating or unused control inputs must be held high or low. dc electrical characteristics (2.7v < v cc 3.6v) note 4: an external driver must source at least the specified current to switch from low-to-high. note 5: an external driver must source at least the specified current to switch from high-to-low. note 6: outputs disabled or 3-state only. supply voltage (v cc ) - 0.5v to + 4.6v dc input voltage (v i ) oe n - 0.5v to 4.6v i 0 C i 15 - 0.5v to v cc + 0.5v output voltage (v o ) outputs 3-stated - 0.5v to + 4.6v outputs active (note 2) - 0.5v to v cc + 0.5v dc input diode current (i ik ) v i < 0v - 50 ma dc output diode current (i ok ) v o < 0v - 50 ma v o > v cc + 50 ma dc output source/sink current (i oh /i ol ) 50 ma dc v cc or gnd current per supply pin (i cc or gnd) 100 ma storage temperature range (t stg ) - 65 c to + 150 c power supply operating 1.65v to 3.6v data retention only 1.2v to 3.6v input voltage - 0.3v to v cc output voltage (v o ) output in active states 0v to v cc output in 3-state 0.0v to 3.6v output current in i oh /i ol v cc = 3.0v to 3.6v 24 ma v cc = 2.3v to 2.7v 18 ma v cc = 1.65v to 2.3v 6 ma free air operating temperature (t a ) - 40 c to + 85 c minimum input edge rate ( d t/ d v) v in = 0.8v to 2.0v, v cc = 3.0v 10 ns/v symbol parameter conditions v cc min max units (v) v ih high level input voltage 2.7 - 3.6 2.0 v v il low level input voltage 2.7 - 3.6 0.8 v v oh high level output voltage i oh = - 100 m a2.7 - 3.6 v cc - 0.2 v i oh = - 12 ma 2.7 2.2 v i oh = - 18 ma 3.0 2.4 v i oh = - 24 ma 3.0 2.2 v v ol low level output voltage i ol = 100 m a2.7 - 3.6 0.2 v i ol = 12 ma 2.7 0.4 v i ol = 18 ma 3.0 0.4 v i ol = 24 ma 3.0 0.55 v i i input leakage current control pins 0 v i 3.6v 2.7 - 3.6 5.0 m a data pins v i = v cc or gnd 2.7 - 3.6 5.0 m a i i(hold) bushold input minimum v in = 0.8v 3.0 75 m a drive hold current v in = 2.0v 3.0 - 75 i i(od) bushold input over-drive (note 4) 3.6 450 m a current to change state (note 5) 3.6 - 450 i oz 3-state output leakage 0 v o 3.6v 2.7 - 3.6 10 m a v i = v ih or v il i off power-off leakage current 0 (v o ) 3.6v 0 10 m a i cc quiescent supply current v i = v cc or gnd 2.7 - 3.6 20 m a v cc (v o ) 3.6v (note 6) 2.7 - 3.6 20 m a d i cc increase in i cc per input v ih = v cc - 0.6v 2.7 - 3.6 750 m a
www.fairchildsemi.com 4 74VCXH16240 dc electrical characteristics (2.3v v cc 2.7v) note 7: an external driver must source at least the specified current to switch from low-to-high. note 8: an external driver must source at least the specified current to switch from high-to-low. note 9: outputs disabled or 3-state only. dc electrical characteristics (1.65v v cc < 2.3v) note 10: an external driver must source at least the specified current to switch from low-to-high. note 11: an external driver must source at least the specified current to switch from high-to-low. note 12: outputs disabled or 3-state only. symbol parameter conditions v cc min max units (v) v ih high level input voltage 2.3 - 2.7 1.6 v v il low level input voltage 2.3 - 2.7 0.7 v v oh high level output voltage i oh = - 100 m a2.3 - 2.7 v cc - 0.2 v i oh = - 6 ma 2.3 2.0 v i oh = - 12 ma 2.3 1.8 v i oh = - 18 ma 2.3 1.7 v v ol low level output voltage i ol = 100 m a2.3 - 2.7 0.2 v i ol = 12 ma 2.3 0.4 v i ol = 18 ma 2.3 0.6 v i i input leakage current control pins 0 v i 3.6v 2.3 - 2.7 5.0 m a data pins v i = v cc or gnd 2.3 - 2.7 5.0 m a i i(hold) bushold input minimum v in = 0.7v 2.3 45 m a drive hold current v in = 1.6v 2.3 - 45 i i(od) bushold input over-drive (note 7) 2.7 300 m a current to change state (note 8) 2.7 - 300 i oz 3-state output leakage 0 v o 3.6v 2.3 - 2.7 10 m a v i = v ih or v il i off power-off leakage current 0 (v o ) 3.6v 0 10 m a i cc quiescent supply current v i = v cc or gnd 2.3 - 2.7 20 m a v cc (v o ) 3.6v (note 9) 2.3 - 2.7 20 m a symbol parameter conditions v cc min max units (v) v ih high level input voltage 1.65 - 2.3 0.65 v cc v v il low level input voltage 1.65 - 2.3 0.35 v cc v v oh high level output voltage i oh = - 100 m a 1.65 - 2.3 v cc - 0.2 v i oh = - 6 ma 1.65 1.25 v v ol low level output voltage i ol = 100 m a 1.65 - 2.3 0.2 v i ol = 6 ma 1.65 0.3 v i i input leakage current control pins 0 v i 3.6v 1.65 - 2.3 5.0 m a data pins v i = v cc or gnd 1.65 - 2.3 5.0 m a i i(hold) bushold input minimum v in = 0.57v 1.65 25 m a drive hold current v in = 1.07v 1.65 - 25 i i(od) bushold input over-drive (note 10) 1.95 200 m a current to change state (note 11) 1.95 - 200 i oz 3-state output leakage 0 v o 3.6v 1.65 - 2.3 10 m a v i = v ih or v il i off power-off leakage current 0 (v o ) 3.6v 0 10 m a i cc quiescent supply current v i = v cc or gnd 1.65 - 2.3 20 m a v cc (v o ) 3.6v (note 12) 1.65 - 2.3 20 m a
5 www.fairchildsemi.com 74VCXH16240 ac electrical characteristics (note 13) note 13: for c l = 50 p f, add approximately 300 ps to the ac maximum specification. note 14: skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of th e same device. the specification applies to any outputs switching in the same direction, either high-to-low (t oshl ) or low-to-high (t oslh ). dynamic switching characteristics capacitance symbol parameter t a = - 40 c to + 85 c, c l = 30 pf, r l = 500 w units v cc = 3.3v 0.3v v cc = 2.5v 0.2v v cc = 1.8v 0.15v min max min max min max t phl , t plh prop delay 0.8 2.5 1.0 3.0 1.5 6.0 ns t pzl , t pzh output enable time 0.8 3.5 1.0 4.1 1.5 8.2 ns t plz , t phz output disable time 0.8 3.5 1.0 3.8 1.5 6.8 ns t oshl output to output skew 0.5 0.5 0.75 ns t oslh (note 14) symbol parameter conditions v cc t a = + 25 c units (v) typical v olp quiet output dynamic peak v ol c l = 30 pf, v ih = v cc , v il = 0v 1.8 0.25 v 2.5 0.6 3.3 0.8 v olv quiet output dynamic valley v ol c l = 30 pf, v ih = v cc , v il = 0v 1.8 - 0.25 v 2.5 - 0.6 3.3 - 0.8 v ohv quiet output dynamic valley v oh c l = 30 pf, v ih = v cc , v il = 0v 1.8 1.5 v 2.5 1.9 3.3 2.2 symbol parameter conditions t a = + 25 c units typical c in input capacitance v cc = 1.8, 2.5v or 3.3v, v i = 0v or v cc 6pf c out output capacitance v i = 0v or v cc , v cc = 1.8v, 2.5v or 3.3v 7 pf c pd power dissipation capacitance v i = 0v or v cc , f = 10 mhz, v cc = 1.8v, 2.5v or 3.3v 20 pf
www.fairchildsemi.com 6 74VCXH16240 ac loading and waveforms figure 1. ac test circuit figure 2. waveform for inverting and non-inverting functions figure 3. 3-state output high enable and disable times for low voltage logic figure 4. 3-state output low enable and disable times for low voltage logic test switch t plh , t phl open t pzl , t plz 6v at v cc = 3.3 0.3v; v cc x 2 at v cc = 2.5 0.2v; 1.8v 0.15v t pzh , t phz gnd symbol v cc 3.3v 0.3v 2.5v 0.2v 1.8v 0.15v v mi 1.5v v cc /2 v cc /2 v mo 1.5v v cc /2 v cc /2 v x v ol + 0.3v v ol + 0.15v v ol + 0.15v v y v oh - 0.3v v oh - 0.15v v oh - 0.15v
7 www.fairchildsemi.com 74VCXH16240 low voltage 16-bit inverting buffer/line driver physical dimensions inches (millimeters) unless otherwise noted 48-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide package number mtd48 fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchilds products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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